| 论文编号: | 172511O120100261 |
| 第一作者所在部门: | 二室四组 |
| 论文题目: | 基于SOI的FPGA的自动测试码流产生 |
| 作者: | 王剑 |
| 论文出处: | EI收录 |
| 刊物名称: | ICSICT2010 |
| 年: | 2010 |
| 影响因子: | 0 |
| 摘要: | We propose a methodology of the automated bitstream generation for conducting high-testability FPGA tests, and explore our methodology in the test of an SOI-based FPGA. We use a semi-automated approach of the bitstream generation for ease of test vector design with high functionality and fault coverage. The methodology is extensively exercised in the design process. The quality is proven by the efficiency of the test vector suite used in the wafer and packaged tests. |
| 备注: | ICSICT2010 |
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